Design of low power random number generators for quantum-dot cellular automata

Document Type : Reasearch Paper

Authors

• Abbas Rezaei ¹
• Hamidreza Saharkhiz ²

¹ Electrical Engineering Department, Kermanshah University of Technology, Kermanshah, Iran.

² Electrical and Electronics Engineering Department, Razi University Tagh-E-Bostan, Kermanshah, Iran.

10.7508/ijnd.2016.04.006

Abstract

Quantum-dot cellular automata (QCA) are a promising nanotechnology to implement digital circuits at the nanoscale. Devices based on QCA have the advantages of faster speed, lower power consumption, and greatly reduced sizes. In this paper, we are presented the circuits, which generate random numbers in QCA.  Random numbers have many uses in science, art, statistics, cryptography, gaming, gambling, and other fields.  The base of these circuits is the linear feedback shift register (LFSR). In this paper, an optimized QCA LFSR is designed, and then different random number generators (RNGs) using XOR and adder are presented. These circuits generate different random numbers in each simulation. The results show that our QCA designs are really fast and optimized in comparison with the previous CMOS and QCA designs.

Keywords

• LFSR
• Low Power
• Nanotechnology
• Quantum-dot cellular Automata
• Random number generator

20.1001.1.20088868.2016.7.4.6.2

Main Subjects

• Nano Computational
• Nanotechnology
• Quantum Dot

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References

[1] International Technology Roadmap for Semiconductors (ITRS), (Available from: http://www.itrs.net.) (2016).

[2] Lent C. S., Tougaw P. D., (1997), A device architecture for computing with quantum dots. Proceed. IEEE. 85: 541-557.

[3] Lent C. S., Isaksen B., Lieberman M., (2003), Molecular quantum dot cellular automata. J. Am. Chem. Soc. 125: 1056–1063.

[4] Bajec L., Zimic N., Mraz M., (2006), Towards the bottom-up concept: Extended quantum-dot cellular automata. Microelect. Eng. 83: 1826–1829.

[5] Snider G. L., Orlov A. O., Amlani I., Bernstein G. H., Lent C. S., Merz J. L., (1999), Quantum-dot cellular automata. Microelectronic Eng. 47: 261–263.

[6] Mardiris V. A., Ioannis G., (2010), Design and simulation of modular 2n to 1 quantum-dot cellular automata (QCA) multiplexers. Int. J. Circuit Theory and Appl. 38: 771–785.

[7] Yang X., Cai L., Huang H., Zhao X., (2012), A comparative analysis and design of quantum-dot cellular automata memory cell architecture. Int. J. Circuit Theory and Appl. 40: 93–103.

[8] Liu M., (2006). Robustness and power dissipation in quantum-dot cellular automata. PhD thesis. Notre Dame University.

[9] Askari M., Taghizadeh M., (2011), Logic circuit design in nano-scale using quantum-dot cellular automata. Europ. J. Sci. Res. 48: 516-526.

[10] Zhang R., Walnut K., Wang W., Jullien G., (2012), A method of majority logic reduction for quantum cellular automata. IEEE. 3: 443-450.

[11] Azari A., Zabihi S. A., Seyyedi S. K., (2012), Conductance in quantum wires by three quantum dots arrays. Int. J. Nano Dimens. 2: 213-216.

[12] Purkayastha T., De D., Chattopadhyay T., (2016), Universal shift register implementation using quantum dot cellular automata. Ain Shams Engineering J. In Press, Corrected Proof.

[13] Kumar D., Mitra D., (2016), Design of a practical fault-tolerant adder in QCA. Microelectronic. J. 53: 90-104.

[14] Majumder A., Singh P. L., Chowdhury B., Mondal A. J., Anand V., (2015), Efficient design and analysis of N-bit reversible shift registers. Procedia Computer Sci. 57: 199-208.

[15] Gladshtein M., (2016), Quantum-dot cellular automata serial decimal processing-in-wire: Run-time reconfigurable wiring approach. Microelectron. J. 55: 152-161.

[16] Heikalabad  S., Navin R., Hosseinzadeh A. H. M., (2016), Content addressable memory cell in quantum-dot cellular automata. Microelect. Eng. 163: 140-150.

[17] Lent C. S., Tougaw P. D., Porod W., (1993), Quantum cellular automata. Nanotechnol. 4: 49-57.

[18] Kim K., (2006), Quantum-dot cellular automata design guideline. EICE transactions on funda-mentals of electronics. Communicat. Computer Sci. 89: 1607-1614.

[19] Mustafa M. , Beigh M. R., (2014), Novel linear feedback shift register design in Quantum Dot celullar automata. Indian J.  Pure and Appleid Physic. 52: 203-209.

[20] Keikha A., Dadkhah C., Tehrani M., Navi K., (2011), A novel design of a random generator circuit in QCA. Int. J. Comp. Applic. 35: 30-36.

[21] Petrie C. S., Connelly J., (2000), A noise-based IC random number generator for applications in cryptography. IEEE Transact. Circuits and Systems. 47: 615-621.

[22] Bucci M., Germani L., Luzzi R., Trifiletti A., Varanonuovo M., (2003), A high-speed oscillator-based truly random number source for cryptographic applications on a smart card IC. IEEE Transact. Computers. 52: 403-409.

[23] Brederlow R., Prakash R., Paulus C., Thewes R., (2006), A low power true random number generator using random telegraph noise of single oxide-traps. IEEE Int. Solid-State Circuits Conference (ISSCC). 1666-1675.

[24] Pareschi F., Setti G., and Rovatti R., (2006), A fast chaos-based true random number generator for cryptographic applications. Proceedings of the 32nd European Solid-State Circuits Conference. 130-133.

[25] Tokunaga C., Blaauw D., Mudge T., (2008), True random number generator with a metastability-based quality control. IEEE J. Solid-State Circuits. 43: 78-85.

[26] Holleman J., Member S., Bridges S., Otis B. P., Diorio C., (2008), A 3W CMOS true random number generator with adaptive floating-gate offset cancellation. IEEE J. Solid-State Circuits. 43: 1324 - 1336.

[27] Pareschi F., Setti G., Rovatti R., (2010), Implementation and testing of high-speed CMOS True random number generators based on chaotic systems. IEEE Transact. Circuits and Systems. 57: 3124 - 3137.

[28] Cao F., Li S., (2010), Random numbers from an integrated CMOS double-scroll IEICE Electronics Express. 7: 1382-1387.

[29] Chen W., Che W., Bi Z., Wang J., Yan N., Tan X., (2009), A 1.04 µW truly random number generator for gen2 RFID tag. IEEE Asian Solid-State Circuits Conference. 117-120.